| 摘要 |
A semiconductor integrated circuit has a bias generation circuit. The bias generation circuit is placed between a power supply voltage node and ground voltage node which are at a far end from a power supply voltage supply terminal and ground voltage supply terminal. Reference voltage nodes are connected to an amplifier circuit block from the far end. In an actual chip layout, the amplifier circuit block is placed closer to the power supply source, and the bias generation circuit is placed distant therefrom. Even if the power supply voltage drops due to current constantly flowing in the amplification circuit block and bias generation circuit, the bias generation circuit generates reference voltages at the reference voltage nodes based on the voltage-dropped power supply. Therefore, the voltage in the constant current source MOS transistor of the amplifier circuit block becomes lowest at the amplifier circuit which is closest to the bias generation circuit. The response speeds of other amplifier circuits do not drop if the semiconductor integrated circuit is designed based on that amplifier which is closest to the bias generation circuit. |
