发明名称 Memory unit and semiconductor device
摘要 A memory unit that is capable of operating in a desired operation condition with less power consumption, and a semiconductor device using the memory unit. The memory circuit comprises a cell array in which a plurality of memory cells is arranged, a driver circuit, a plurality of selection circuits each of which includes a memory circuit, and a power source circuit. A plurality of potentials is supplied to each of plurality of selection circuits from the power source circuit, each of plurality of selection circuits selects a potential among the plurality of potentials in accordance with data stored in each memory circuit, and the selected potential is supplied to a memory cell corresponding to each of the plurality of selection circuits among the plurality of memory cells by a signal output from the driver circuit.
申请公布号 US7200050(B2) 申请公布日期 2007.04.03
申请号 US20040849217 申请日期 2004.05.20
申请人 SEMICONDUCTOR ENERGY LABORATORY CO., LTD. 发明人 KATO KIYOSHI
分类号 G11C5/14;G11C11/4074;G11C11/408;H01L21/8242;H01L27/105;H01L27/108;H01L27/12;H01L29/786 主分类号 G11C5/14
代理机构 代理人
主权项
地址