发明名称 Error checking and correcting for content addressable memories (CAMs)
摘要 Error checking and correcting (ECC) is performed on data held in a content addressable memory. An error check circuit receives words from a memory circuit or circuits, generates an error status and generates a corrected value when appropriate. A control circuit sequences through each of the words of the memory circuit(s), periodically reads from the memory circuit the next word in the sequence and provides the next word to the error check circuit. The bandwidth consumed by the periodic error check phase can be controlled by adjusting the interval between reads.
申请公布号 US7200793(B1) 申请公布日期 2007.04.03
申请号 US20020106305 申请日期 2002.03.22
申请人 ALTERA CORPORATION 发明人 KENGERI SUBRAMANI;CARR DAVID WALTER;NADJ PAUL;SAMALA JAYA PRAKASH
分类号 G11C29/00 主分类号 G11C29/00
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