发明名称 DC-DC converter connected to phase locked loop
摘要 A DC-DC converter is provided. The DC-DC converter is connected to a PLL circuit, supplying a voltage at least to a power source terminal of a voltage controlled oscillator of the PLL circuit. A frequency of a ripple voltage included in the voltage is less than a natural frequency of the PLL circuit or more than one-half of a frequency of an output signal of the PLL circuit.
申请公布号 US7199627(B2) 申请公布日期 2007.04.03
申请号 US20040011236 申请日期 2004.12.14
申请人 SEIKO EPSON CORPORATION 发明人 KOZAKI MINORU
分类号 H02M3/00;H03L7/06;G05F1/40;H02M3/07;H03L7/08;H03L7/089;H03L7/18 主分类号 H02M3/00
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