| 摘要 |
PROBLEM TO BE SOLVED: To improve access time without increasing manufacturing costs and without sacrificing a high-precision recording pulse. SOLUTION: A recording clock generation circuit 7 is provided with a PLL circuit provided with an oscillator and generating a recording pulse generation clock (SCLK) for generating a recording clock signal (WCLK) that is a synchronization signal for performing a prescribed modulation processing to recording data to be recorded on an optical disk 1 in synchronization with a wobble signal (WBL). A divider 8 divides the recording pulse generation clock signal to generate the recording clock signal. A synchronization detection circuit 12 and an address decoder 9 detect and demodulate the address signal recorded on the optical disk 1 in synchronization with the wobble signal with the recording clock signal. During seek to the outer circumference of the optical disk 1, the division ratio of the divider 8 is varied so that the frequency of the recording clock signal is lowered than that during seek to the inner circumference. COPYRIGHT: (C)2007,JPO&INPIT
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