PHASE LOCKED LOOP CIRCUIT, LOOP FILTER GAIN CONTROL METHOD OF PHASE LOCKED LOOP CIRCUIT AND REPRODUCING DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a phase locked loop circuit which shortens capture time and improves an error rate by automatically controlling the loop filter gain of a digital PLL.

SOLUTION: A lock mode generation circuit 29 outputs the automatic adjustment gain Kp_auto and Ki_auto of a loop filter 19 on the basis of frequency adjusted reproducing signals (e) from an equalizer 10, a SAM value from a viterbi decoder 12 and synchronized reproducing signals (f) which are filter output from an interpolation filter 24.

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