发明名称 Leiterplatte und Verfahren zu deren Herstellung
摘要 <p>A circuit board includes an electrical insulator layer formed of a reinforcer sheet (101) with density distribution in its in-plane direction, an electrical conductor filled in a plurality of inner via holes provided in the electrical insulator layer in its thickness direction, and a wiring layer connected to the electrical conductor. The inner via holes (104) provided in a high-density portion of the reinforcer sheet (101) are formed to have a smaller cross-section than the inner via holes (103) provided in a low-density portion of the reinforcer sheet. In this manner, it is possible to provide a circuit board that can achieve a high-density wiring and an inner via connection resistance with less variation, when a base material including a reinforcer sheet with density distribution in its in-plane direction such as a glass cloth formed of warps (102b) and wefts (102a) is used for an insulator layer. <IMAGE></p>
申请公布号 DE60126555(D1) 申请公布日期 2007.03.29
申请号 DE2001626555 申请日期 2001.11.05
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD. 发明人 SUZUKI, TAKESHI;NISHI, TOSHIHIRO;TOMEKAWA, SATORU;ECHIGO, FUMIO
分类号 H05K3/40;H05K1/03;H05K1/11;H05K3/00;H05K3/46 主分类号 H05K3/40
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