发明名称 MEMORY CONTROLLER AND FLASH MEMORY SYSTEM
摘要 PROBLEM TO BE SOLVED: To smoothly access an address space composed of two flash memories. SOLUTION: The memory controller comprises: flash memory sequencer blocks 16A and 16B for controlling access to a page specified on the basis of the physical start page addresses and physical count values of the two flash memories 2A and 2B; an address conversion block 17 for converting a virtual start page address to the physical start page addresses of the respective flash memories 2A and 2B and supplying them to the flash memory sequencer blocks 16A and 16B; and a count value conversion block 18 for converting a virtual count value to the physical count values of the respective flash memories 2A and 2B and supplying them to the flash memory sequencer blocks 16A and 16B. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007079920(A) 申请公布日期 2007.03.29
申请号 JP20050266669 申请日期 2005.09.14
申请人 TDK CORP 发明人 MITSUNAGA TAKUMA
分类号 G06F12/06;G06F12/00 主分类号 G06F12/06
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