发明名称 Reconfigurable memory block redundancy to repair defective input/output lines
摘要 An embodiment of the present invention is a technique to provide a reconfigurable repair circuit in a memory device. A table structure contains a plurality of entries, each entry having a defective address word and a redundant address word. The redundant address word corresponds to a redundant block and is generated in response to a memory access to a defective input/output (I/O) line in a memory block of the memory device. A decoding circuit decodes the redundant address word to select a redundant I/O line in the redundant block to replace the defective I/O line.
申请公布号 US2007070734(A1) 申请公布日期 2007.03.29
申请号 US20050240304 申请日期 2005.09.29
申请人 HSU POCHANG;DODGE RICHARD K 发明人 HSU POCHANG;DODGE RICHARD K.
分类号 G11C29/00 主分类号 G11C29/00
代理机构 代理人
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