| 摘要 |
PROBLEM TO BE SOLVED: To stably and highly reliably confirm modulation ON/OFF operation of an EMI (electromagnetic interference) reduction test circuit, provided in the inside of a semiconductor chip, such as ASIC. SOLUTION: The EMI reduction modulation circuit comprises an SSCG circuit 1 for reducing EMI, by down-spread/center-spread modulating the clock frequency of ASIC in ASIC, a first counter 3 for counting with an output clock of the SSCG circuit 1, a first control means (second counter 2, a second comparator 4, a reset circuit 5 and a third register 6) for restricting the counting operation by the first counter 3 in a prescribed period, a first register 7 for storing the counted value in the prescribed period during modulation ON operation of the SSCG circuit 1 by the first counter 1, a second register 8 for storing the counted value in a prescribed period during modulation OFF operation, and a first comparator 9 for outputting a signal (H/L), indicating either matching or unmatching, by comparing the counted value stored in the first and second registers 7 and 8. COPYRIGHT: (C)2007,JPO&INPIT
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