发明名称 System and method for Electrical Impedance Tomography
摘要 A method and a system for electrical impedance tomography are provided to reduce a digital clock noise by radially and symmetrically arranging volt-meters which are connected to analog and digital mother boards. A system for electrical impedance tomography includes plural electrodes(250), a current source(230), a first board(240), plural volt-meters(260), a main controller(210), and a second board(220). The electrodes are attached to an object to be measured. The first board includes plural switches for selectively supplying currents to at least one electrode pair. The volt-meter detects a voltage on a surface of the object, removes a noise from a detected voltage, and amplifies the detected voltage. The main controller selects the electrode pair and collects an amplification ratio of the volt-meter and the detected voltage. The second board controls the current source, the first board, the volt-meters, and the main controller.
申请公布号 KR100700112(B1) 申请公布日期 2007.03.28
申请号 KR20060010629 申请日期 2006.02.03
申请人 发明人
分类号 A61B5/04 主分类号 A61B5/04
代理机构 代理人
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