SEMICONDUCTOR MEMORY DEVICE WITH REDUCED LAYOUT AREA, IN WHICH EQUALIZER LINE IS DISPOSED BETWEEN COLUMN SELECTION LINES, AND LAYOUT METHOD THEREOF,申请号KR20050088240-传众专利搜索

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发明名称	SEMICONDUCTOR MEMORY DEVICE WITH REDUCED LAYOUT AREA, IN WHICH EQUALIZER LINE IS DISPOSED BETWEEN COLUMN SELECTION LINES, AND LAYOUT METHOD THEREOF
摘要
申请公布号	KR20070033746(A)	申请公布日期	2007.03.27
申请号	KR20050088240	申请日期	2005.09.22
申请人		发明人
分类号	H01L27/04;G11C5/06	主分类号	H01L27/04
代理机构		代理人
主权项
地址

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