发明名称 Corner protection to reduce wrap around
摘要 A method and structure are provided with reduced gate wrap around to advantageously control for threshold voltage and increase stability in semiconductor devices. A spacer is provided aligned to field dielectric layers to protect the dielectric layers during subsequent etch processes. The spacer is then removed prior to subsequently forming a part of a gate oxide layer and a gate conductor layer. Advantageously, the spacer protects the corner area of the field dielectric and also allows for enhanced thickness of the gate oxide near the corners.
申请公布号 US7196381(B2) 申请公布日期 2007.03.27
申请号 US20050048668 申请日期 2005.01.31
申请人 PROMOS TECHNOLOGIES PTE. LTD. 发明人 HSIAO CHIA-SHUN;KIM DONG JUN
分类号 H01L29/76;H01L21/311;H01L21/762;H01L21/8234;H01L29/423;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L29/76
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