| 摘要 |
<p>A non-volatile semiconductor memory device includes a memory cell array constituted of a plurality of memory cell units arranged on a semiconductor substrate in rows and columns, each of the memory cell units is constituted of a plurality of electrically rewritable memory cells connected to each other, and has a selective transistor at one end, and a plurality of bit lines arranged in parallel in a column direction and connected to corresponding one of the memory cell units at the one end of the memory cell unit, and a selective gate line connected to a gate of the selective transistor. In data writing operation, the voltage Vsg of the selective gate line is set at a voltage which is higher than an external power supply voltage and satisfies the relationship Vth(0)<Vsg<Vbit+Vth(-Vbit) (wherein Vth(x) is the threshold voltage of the selective transistor when a semiconductor substrate surface in which the memory cell array is formed is applied with x volt, and Vbit is a voltage applied to non-select bit lines among the plurality of bit lines). In this manner, the non-volatile semiconductor memory device sets the voltage Vbit higher than the external power supply voltage.</p> |
