发明名称 INTEGRATED CIRCUIT DEVICE AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide an integrated circuit device having a programmable ROM provided with a new structure internally storing adjusting data to be mainly set by a user. SOLUTION: A programmable ROM block 20 provided in the integrated circuit device 10 has a memory cell MC in which a floating gate FG shared in each of gates of a writing/reading transistor 220 and an erasing transistor 230 is a single layer gate structure opposite to a control gate CG consisting of an impurity layer NCU via an insulation layer. The memory cell MC has a triple well structure of: a first conductive type upper layer well PWEL formed on a second conductive type depth layer well DNWL; a second conductive type annular upper layer well NWEL1 surrounding it; and a first conductive type upper layer well and uppermost layer impurity regions (P, N) formed on the second conductive type annular upper layer well. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007073894(A) 申请公布日期 2007.03.22
申请号 JP20050262388 申请日期 2005.09.09
申请人 SEIKO EPSON CORP 发明人 NATORI KANJI;MAEMURA KIMIHIRO;TAKAAI TOMOO;WATANABE KUNIO;HAYASHI MASAHIRO
分类号 H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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