| 摘要 |
A bias-T circuit including a radio frequency signal input device and a dc bias input device connected in parallel with an output. The radio frequency signal input device includes a capacitive element in series with the output. The dc bias input device includes a radio frequency transistor for controlling the dc bias level at the output. The f<SUB>T </SUB>value of the radio frequency transistor is at least 30 GHz, more preferably at least 50 GHz and yet more preferably at least 70 GHz.
|
