发明名称 SURROUND GATE ACCESS TRANSISTORS WITH GROWN ULTRA-THIN BODIES
摘要 A vertical transistor having an annular transistor body surrounding a vertical pillar, which can be made from oxide. The transistor body can be grown by a solid phase epitaxial growth process to avoid difficulties with forming sub-lithographic structures via etching processes. The body has ultra-thin dimensions and provides controlled short channel effects with reduced need for high doping levels. Buried data/bit lines are formed in an upper surface of a substrate from which the transistors extend. The transistor can be formed asymmetrically or offset with respect to the data/bit lines. The offset provides laterally asymmetric source regions of the transistors. Continuous conductive paths are provided in the data/bit lines which extend adjacent the source regions to provide better conductive characteristics of the data/bit lines, particularly for aggressively scaled processes.
申请公布号 US2007066019(A1) 申请公布日期 2007.03.22
申请号 US20060557224 申请日期 2006.11.07
申请人 FORBES LEONARD 发明人 FORBES LEONARD
分类号 H01L21/336 主分类号 H01L21/336
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