发明名称 WAFER LEVEL CHIP SIZE PACKAGE FOR IMAGE SENSOR MODULE AND METHOD OF MANUFACTURING SAME
摘要 <P>PROBLEM TO BE SOLVED: To provide a new wafer level chip size package (WL-CSP) which can achieve a lighter, slimmer, shorter, and smaller image sensor module, and to provide a method of manufacturing the same. <P>SOLUTION: A method of manufacturing a wafer level chip size package for an image sensor module includes: a step of bonding an image sensor wafer and a glass wafer coated with an IR cut filter layer, and then of forming through-holes in the image sensor wafer; a step of filling the through-holes with a conductive material to form conductors; and a step of forming a solder bump at the end of each conductor, and then of joining the solder bumps to a PCB substrate on which a circuit is formed. The wafer level chip size package is especially characterized by a structure in which the glass wafer coated with the IR cut filter layer is bonded to the image sensor wafer through a polymer partition wall, and the solder bumps are formed on back electrodes of the image sensor wafer that are connected to I/O electrodes of the image sensor wafer respectively through the conductors in the through holes. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007073958(A) 申请公布日期 2007.03.22
申请号 JP20060234379 申请日期 2006.08.30
申请人 KOREA ADVANCED INST OF SCI TECHNOL 发明人 PAIK KYUNG WOOK;YIM MYUNG-JIN;SON HO-YOUNG
分类号 H01L27/14;H01L23/02;H01L27/146;H04N5/335 主分类号 H01L27/14
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