发明名称 Interconnect structure and method of manufacturing the same
摘要 The invention is directed to a method for manufacturing an interconnect structure suitable for a substrate having a semiconductor device formed thereon, wherein the semiconductor device possesses a metal silicide layer predetermined as an electrically connecting region. The method comprises steps of forming a conformal adhesion layer over the substrate, forming a dielectric layer on the conformal adhesion layer and then performing a chemical mechanical polishing process to planarize the dielectric layer. Further, an opening penetrating through the dielectric layer and the conformal adhesion layer is formed, wherein the opening exposes a portion of the metal silicide layer. A conductive plug is formed in the opening.
申请公布号 US2007063349(A1) 申请公布日期 2007.03.22
申请号 US20050231264 申请日期 2005.09.19
申请人 KAO TSUI-LIEN;TSAI HUEI-JU;WANG SHYAN-YHU;LIN JY-HWANG 发明人 KAO TSUI-LIEN;TSAI HUEI-JU;WANG SHYAN-YHU;LIN JY-HWANG
分类号 H01L21/4763;H01L21/44;H01L23/48 主分类号 H01L21/4763
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