发明名称 Method and system for embedding wire model objects in a circuit schematic design
摘要 The present invention is a method and system for schematically embedding wire model objects into a schematic design of an integrated circuit. The method includes estimating a wiring routing geometry for each signal path in the circuit, selecting one or more cascading wire model objects ("WMOs") for each segment in each geometry, and substituting each signal path with the respective one or more WMOs.
申请公布号 US2007067749(A1) 申请公布日期 2007.03.22
申请号 US20050232745 申请日期 2005.09.22
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 AMIT NIV;BUSTIN RONIT;GOREN LIDOR;HEYMANN OMER;LEIBOWITZ MOSHE;NOY GIL;RAPHAYEVICH ALEX;SPEISER MAYA
分类号 G06F17/50 主分类号 G06F17/50
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