LEAD PIN FOR MOUNTING SEMICONDUCTOR AND PRINTED WIRING BOARD

摘要

Providing a semiconductor loading lead pin which does not tilt at the time of reflow. Void B is sometimes left in solder 48 between an electrode pad 44 and the flange 20 of a semiconductor loading lead pin as shown in FIG. 3(A). When reflow is carried out to load an IC chip, solder 48 for connection is melted and at the same time, void B in the solder is expanded. Because it escapes sideway along the groove portion 24 as shown in FIG. 3(B), it does not happen that the flange 20 is raised by the void B so that the semiconductor loading lead pin 10 is tilted.