发明名称 Non-planar MOS structure with a strained channel region
摘要 An embodiment is a non-planar MOS transistor structure including a strained channel region. The combination of a non-planar MOS transistor structure, and in particular an NMOS tri-gate transistor, with the benefits of a strained channel yields improved transistor drive current, switching speed, and decreased leakage current for a given gate length width versus a non-planar MOS structure with an unstrained channel or planar MOS structure including a strained channel.
申请公布号 US7193279(B2) 申请公布日期 2007.03.20
申请号 US20050039197 申请日期 2005.01.18
申请人 INTEL CORPORATION 发明人 DOYLE BRIAN S.;DATTA SUMAN;JIN BEEN-YIH;CHAU ROBERT
分类号 H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119 主分类号 H01L29/76
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