发明名称 Ultra-thin wafer level stack packaging method
摘要 A method of forming an ultra-thin wafer level stack package and structure thereof are provided. The method includes providing a first wafer having a plurality of base chips thereon, selectively binding the first wafer to a second substrate, lapping the first wafer to reduce its thickness, dicing the lapped first wafer, bonding a plurality stack chips to each base chip and packaging the base chip with the bonded stack chips to form an IC package. Thus, each IC package comprises at least a base chip and a stack chip. The IC package has a size almost identical to the base chip and a thickness a little larger than the combined thickness of the base chip and the stack chip. If a known good die inspection of the base chips and stack chips are carried out prior to wafer level packaging, overall yield of the IC package is increased.
申请公布号 US7192847(B2) 申请公布日期 2007.03.20
申请号 US20050906136 申请日期 2005.02.04
申请人 UNITED MICROELECTRONICS CORP. 发明人 HSUAN MIN-CHIH
分类号 H01L21/44;H01L21/301;H01L21/46;H01L21/48;H01L21/50;H01L21/98;H01L23/02;H01L23/31;H01L25/065 主分类号 H01L21/44
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