| 摘要 |
A signal processing circuit. A first flip flop samples a reference signal by rising edges of the data strobe signal, and outputs a first sampling signal. A second flip flop samples the first sampling signal by falling edges of the data strobe signal, and outputs a second sampling signal. An OR logic gate is coupled to the first sampling signal, the second sampling signal, and the reference signal to generate a logic signal. A clock gating circuit generates a modified data strobe signal according to the data strobe signal and the logic signal.
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