| 摘要 |
A column decoding apparatus of a semiconductor memory is provided to reduce operation current of the semiconductor memory by preventing the generation of an unnecessary column select signal. A column decoding apparatus of a semiconductor memory includes a first control signal output unit(231), a second control signal output unit(233), a first driving unit(235), and a second driving unit(237). The first control signal output unit receives a column address enable signal and an up-mat signal and outputs a first control signal. The second control signal output unit receives a column address enable signal and a down-mat signal and outputs a second control signal. The first driving unit outputs an inputted first pre-decoding signal in response to the first control signal. The second driving unit outputs the inputted first pre-decoding signal in response to the second control signal.
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