| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To simplify the circuitry of a zigzag data generation circuit which reads out image data in zigzag, by rearranging the order of reading. <P>SOLUTION: The zigzag data generation circuit comprises a plurality of registers 10<SB>1</SB>-10<SB>64</SB>for holding image data DAT provided commonly to an input terminal A in accordance with a write permission signal Aj, provided individually from an address recorder 22 when write operation is specified by a select signal SEL, and for holding data provided at an input terminal B in accordance with a shift clock SCK provided commonly when read operation, is specified by the select signal SEL and outputting the data which has been held until then. The output terminals of these registers 10<SB>1</SB>-10<SB>64</SB>are connected sequentially with the input terminal B, such that the image data DAT can be outputted in a predetermined rearranged order, and a shift register is constituted. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
