<p>A PLL comprises a current control oscillator (18), a current source (28), and an initialization switch (26). The current control oscillator (18) generates an output clock signal according to a current signal generated based on the phase difference between a reference clock signal and a feedback clock signal. The initialization switch (26) is inserted in series to the input terminal of the current control oscillator (18) and the current source (28), and performs a switching operation according to an initialization signal.</p>
申请公布号
WO2007029428(A1)
申请公布日期
2007.03.15
申请号
WO2006JP314916
申请日期
2006.07.27
申请人
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;OKAMOTO, TATSUO;ARIMA, YUKIO;EBUCHI, TSUYOSHI;HIRATA, KYOKO