| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To enable suppressing occurrence of a program disturb failure and also degradation in an error correction capability of an ECC circuit in a NAND type flash memory with the ECC circuit. <P>SOLUTION: For example, in a case of a many-valued logic NAND type flash memory provided with the ECC circuit in which an allowable bit number n per page is made to 4 bits, at the time of data write operation, write loop is repeated while stepping up a word-line voltage. Then, when the number m of program unended memory cells in a page becomes 2 bits (M1) or less, one write loop is additionally performed by stepping up the word-line voltage by one. Thereafter, the write loop is halted irrespective of whether or not the writing of the program unended memory cells is ended. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
