发明名称 INTEGRATED CIRCUIT DIE CONFIGURATION FOR PACKAGING
摘要 Integrate circuit die terminal arrangements and configurations for mounting an integrate circuit die on a package substrate to reduce package transmission paths. In one embodiment, terminals for signals sensitive to trace length outside a die are arranged at the corners of the die. The die is mounted on a package substrate in an angle with respect to a package substrate to point the corners of the die at the edges of the package substrate to reduce trace length outside the die. The center of the die may or may not coincide with the center of the substrate. In one embodiment, when compare to a centered, non-rotated die mounting position, mounting a die with corners pointing at the edges of the package substrate does not cause significant differences in substrate warpage.
申请公布号 US2007057381(A1) 申请公布日期 2007.03.15
申请号 US20060554528 申请日期 2006.10.30
申请人 WONG CHEE W;LEE CHEE H 发明人 WONG CHEE W.;LEE CHEE H.
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
主权项
地址
您可能感兴趣的专利