发明名称 IMAGE PROCESSOR
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an image processor in which power consumption is reduced by reducing wasteful memory transfer between a video decoder and a display frame memory. <P>SOLUTION: A variable length decoding section 12 performs variable length decoding of a bit stream inputted from a buffer control section 11 and delivers encoded information to a display control section 17. The display control section 17 determines whether the content varied more than a predetermined amount from the last display update or not for each block based on the encoded information. A block that has been determined that the content varied more than a predetermined amount is transferred from a prediction frame memory 22 or 23 to a display frame memory 40 and is updated. Consequently, wasteful memory transfer between the display control section 17 and the display frame memory 40 can be reduced, and power consumption can be reduced. <P>COPYRIGHT: (C)2007,JPO&INPIT</p>
申请公布号 JP2007067526(A) 申请公布日期 2007.03.15
申请号 JP20050247804 申请日期 2005.08.29
申请人 SHARP CORP 发明人 NAGATAKI SHINGO;TOKUGE YASUAKI
分类号 H04N19/50;H04N19/102;H04N19/136;H04N19/137;H04N19/139;H04N19/147;H04N19/176;H04N19/196;H04N19/423;H04N19/503;H04N19/513;H04N19/567;H04N19/577;H04N19/61;H04N19/625;H04N19/91 主分类号 H04N19/50
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