| 摘要 |
A semiconductor memory module and a semiconductor memory system are provided to largely increase data throughput and concurrency by making a host exchange a command, an address and/or data with a primary memory, and input/output the needed data through other idle ports of a secondary memory through a background operation at the same time. At least one primary memory(310) transceives the first packet data with the host(350) through the first port and transceives the second packet data with the host through the second port. At least one secondary memory(320) receives the second packet data from the primary memory through the third port. The secondary memory is connected to the matched primary memory in a point-to-point connection type. In case that the host performs a write operation to the secondary memory, the primary memory receives command, address and write data packet data from the host through the first port and relays the received packet data to the secondary memory through the second port.
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