发明名称 PLANARIZATION METHOD OF MANUFACTURING A SUPERJUNCTION DEVICE
摘要 A method of manufacturing a semiconductor device includes providing a substrate having first and second main surfaces. The substrate has a heavily doped region of a first conductivity at the second main surface and has a lightly doped region of the first conductivity at the first main surface. The method includes providing trenches and mesas in the substrate, implanting, at an angle, a dopant of the first conductivity into a sidewall of a mesa and implanting, at an angle, a dopant of a second conductivity into the mesa at another sidewall. The method includes oxidizing the sidewalls and bottoms of each trench and tops of the mesas to create a top oxide layer, etching back the top oxide layer to expose a portion of the mesa, depositing an oxide layer to cover the etched back top layer and mesa and planarizing the top surface of the device. ® KIPO & WIPO 2007
申请公布号 KR20070029656(A) 申请公布日期 2007.03.14
申请号 KR20067014533 申请日期 2006.07.19
申请人 THIRD DIMENSION SEMICONDUCTOR, INC. 发明人 HSHIEH FWU IUAN
分类号 H01L21/336;H01L21/265;H01L21/31;H01L21/425;H01L21/469;H01L21/8234;H01L29/06;H01L29/10;H01L29/78;H01S5/00 主分类号 H01L21/336
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