发明名称 |
Asynchronous communication system and method between synchronous sub-circuits on a chip. |
摘要 |
<p>The system has a synchronous subcircuit (SC1) with a register (REG1) for transmitting several data packets to a synchronous subcircuit (SC2) through a mesochronous unidirectional communication link (LCUM1). The subcircuit (SC2) has memory organized as a queue (FIFO1) and a flip-flop (BASC1) for transmitting availability information of an additional elementary memory location in the queue to the subcircuit (SC1), through another mesochronous unidirectional communication link (LCUM2), as soon as an elementary memory location of the queue is read by the subcircuit (SC2). An independent claim is also included for a method of on-circuit asynchronous communication between synchronous subcircuits.</p> |
申请公布号 |
EP1762944(A1) |
申请公布日期 |
2007.03.14 |
申请号 |
EP20060290549 |
申请日期 |
2006.04.05 |
申请人 |
ARTERIS |
发明人 |
DOUADY, CESAR;BOUCARD, PHILIPPE;MONTPERRUS, LUC |
分类号 |
G06F13/42;G06F5/06;G06F15/76 |
主分类号 |
G06F13/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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