| 摘要 |
A state control method of a processor board is provided to be capable of monitoring a state of the processor board by using a checkstop signal indicative of abnormal states of an I/O(Input/Output) processor and a main processor, thereby preventing a watchdog reset signal from being generated. Power is on to execute initialization of a processor board(S201). It is detected whether a main processor demands bus usage by using a BR(Bus Request) signal(S202-S206). It is decided whether a state of the BR signal is transferred for a certain time(S208). If not, it is detected whether the main processor is abnormal(S209). The processor board is reset, depending on whether the main processor is abnormal, and the reset processor board is initialized(S210).
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