发明名称 Semiconductor wafer level chip package and method of manufacturing the same
摘要 A semiconductor chip package may include one or more conductive patterns provided on a front surface of a wafer. An encapsulation layer may cover at least the front surface of the wafer. Chip plugs may be electrically connected to the conductive patterns, and may be embedded in a rear surface of the wafer. External connection terminals may be electrically connected to the chip plugs, and may be provided on the rear surface of the wafer.
申请公布号 US2007052094(A1) 申请公布日期 2007.03.08
申请号 US20060431084 申请日期 2006.05.10
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM GOON-WOO;HAN MAN-HEE;KIM JAE-HONG;KIM HEUI-SEOG;KIM SANG-JUN;SIN WHA-SU
分类号 H01L23/48;H01L21/44 主分类号 H01L23/48
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