| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To improve write speed by preventing reduction of write voltage applied to a memory cell in a semiconductor integrated circuit incorporating a nonvolatile memory electrically erasing data. <P>SOLUTION: The semiconductor integrated circuit is provided with a plurality of memory cells arranged in a two dimensional array, a row selection signal output circuit 50 outputting a row selection signal to a word line, a column selection signal output circuit 30 outputting a column selection signal to a column line, a selection circuit selecting at least one memory cell out of the plurality of memory cells based on the row selection signal output from the row selection signal output circuit and the column selection signal output from the column selection signal output circuit, and a write/read circuit 70 writing data or reading data for at least one memory cell selected by the selection circuit through at least one bit line. <P>COPYRIGHT: (C)2007,JPO&INPIT</p> |
