发明名称 SEMICONDUCTOR INTEGRATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To conduct a scanning test at correct power supply voltage by avoiding instantaneous power supply voltage reduction even during the time of capture operation in scanning tests of the semiconductor integrating circuit. SOLUTION: The scanning test is conducted at the correct power supply voltage, such that the semiconductor integrating circuit 7 is equipped with: a power consumption circuit 2 for controlling generation of stationary power consumption through the power consumption control signal 1; and a power supply voltage reduction observing section 3. The power consumption circuit 2 is controlled to generate stationary power consumption to generate stationary power supply voltage reduction by absorbing power supply voltage reduction due to instantaneous power supply current, and by observing the power supply voltage in a semiconductor integrated circuit inspection device 9 through the power supply voltage reduction observing section 3 to apply the voltage so as to complement the amount of voltage reduction from the semiconductor integrated circuit inspection device 9, the instantaneous power supply voltage reduction is avoided even during the time of capture operation. COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007057423(A) 申请公布日期 2007.03.08
申请号 JP20050244172 申请日期 2005.08.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAJI AKIHIRO;NAKAJIMA YUICHI;SAKAI YASUNAO
分类号 G01R31/28;H01L21/822;H01L27/04;H03K19/00 主分类号 G01R31/28
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