| 摘要 |
An input side is configured with a pulse generating circuit, a delay circuit, a driving circuit, and two light emitting elements connected to the driving circuit, and an output side is configured with two light receiving elements, connected to a computation circuit, and the pulse generating circuit, and based on a directly connected input signal, a clock pulse signal that is input from the pulse generating circuit, and a delayed input signal that is input from the delay circuit, the driving circuit causes the two light emitting elements to alternately emit light with offset timing. On the other hand, the computation circuit, while synchronizing with the signals from the two light emitting elements, by alternately receiving signals with the two light receiving elements, transmits a signal by pairing these two light receiving elements.
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