| 摘要 |
A semiconductor memory device is provided to prevent an operation error due to the driving of a test mode during a normal driving operation by supplying a driving voltage of a test-mode register to control a test mode through an option pad. A first test-mode register(100) generates a test signal for testing the driving of an internal logic circuit through the combination of an external command and an address, and receives a driving voltage through the connection of first and second voltage pads(120,140). A second test-mode register(200) generates a test signal to control the generation of an internal voltage, and receives a driving voltage through an option pad(220) and the second voltage pad.
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