发明名称 Semiconductor memory and system apparatus
摘要 <p>A register part of a mode register has a plurality of operation setting parts in which plural types of operating specifications are respectively set to operate the semiconductor memory. The mode register outputs a soft reset signal when at least a value of one-bit of the register part represents a reset state. A reset signal generator outputs a reset signal for resetting an internal circuit in response to the soft reset signal. In the present invention, a system that controls the semiconductor memory is required to necessarily assign a predetermined bit with a setting command of the mode register in order to generate the soft reset signal. Accordingly, it is possible to reliably reset the internal circuit by external control.</p>
申请公布号 EP1705663(A3) 申请公布日期 2007.03.07
申请号 EP20050013395 申请日期 2005.06.22
申请人 FUJITSU LIMITED 发明人 NISHIMURA, KOICHI;YAMADA, SHINICHI;NOMURA, YUKIHIRO
分类号 G11C7/10 主分类号 G11C7/10
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