| 摘要 |
A processor is programmed to reduce a problem of adding a new connection to a time-space-time (TST) switch of a communication network into a problem of graph theory, and to solve the problem using a heuristic instead of an exact algorithm. A solution, if provided by the heuristic, is used to rearrange the connections in the TST switch. Several embodiments of such a programmed processor reduce a connection rearrangement problem of a TST switch into any one of the NP-complete problems (such as the vertex coloring problem or the boolean satisfiability (SAT) problem). In some such embodiments, the processor is programmed based on the Brélaz heuristic to find a solution to the vertex coloring problem. In other embodiments, other heuristics, such as a genetic algorithm, may be used.
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