发明名称 |
Leakage balancing transistor for jitter reduction in CML to CMOS converters |
摘要 |
The CML (current mode logic) to CMOS converter with a leakage balancing transistor for jitter reduction includes: a differential input stage; an output stage having a first branch coupled to a first output of the differential input stage and a second branch coupled to a second output of the differential input stage; and a leakage balancing transistor coupled to the first branch of the output stage.
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申请公布号 |
US7187207(B2) |
申请公布日期 |
2007.03.06 |
申请号 |
US20050168034 |
申请日期 |
2005.06.27 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
ROWLEY MATTHEW D. |
分类号 |
H03K19/0175;H03K19/086;H03K19/094;H03K19/20 |
主分类号 |
H03K19/0175 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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