摘要 |
A virtual ground memory array (VGA) (10) is formed by a storage layer (14) over a substrate (12) with a conductive layer (16, 18) over the storage layer (14). The conductive layer (16, 18) is opened according to a patterned photoresist layer. The openings are implanted (20) to form source/drain lines (22, 24, 26) in the substrate (12), then filled with a layer of dielectric material (28). Chemical mechanical polishing (CMP) is then performed until the top of the conductive layer (16, 18) is exposed. This leaves dielectric spacers (30, 32, 34) over the source/drain lines (22, 24, 26) and conductive material between the dielectric spacers (30, 32, 34). Word lines (36) are then formed over the conductive material (16, 18) and the dielectric spacers (30, 32, 34). As an alternative, instead of using a conductive layer (16, 18), a sacrificial layer (68) is used that is removed after the CMP step. After removing the sacrificial portions, the word lines (80) are formed. In both cases, dielectric spacers (16, 18, 56, 58) reduce gate/drain capacitance and the distance from substrate (12) to gate is held constant across the channel. |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;SWIFT, CRAIG T.;CHINDALORE, GOWRISHANKAR L.;PARKER, LAUREEN H. |
发明人 |
SWIFT, CRAIG T.;CHINDALORE, GOWRISHANKAR L.;PARKER, LAUREEN H. |