METHODS AND APPARATUS FOR DESKEWING VCAT/LCAS MEMBERS
摘要
<p>Write logic and read logic are coupled to SDRAM and a frame status table. VCG members are written into SDRAM by the write logic and an entry (based on the MFI and SQ) in the frame status table is maintained by the write logic for each member. The read logic scans the frame status table to identify the earliest frame number for which data is available in SDRAM. Based on the frame status and the address pointer offset, the read logic maintains a state table entry for each VCG member and a state for each VCG. According to the preferred embodiment, the read logic is provided in two parts separated by a temporary buffer. The first pait of the read logic performs the functions described above and writes chunk data into the temporary buffer. The second part of the read logic reads byte data from the temporary buffer according to a selectable leak rate.</p>
申请公布号
WO2007024729(A2)
申请公布日期
2007.03.01
申请号
WO2006US32430
申请日期
2006.08.21
申请人
TRANSWITCH CORPORATION;GUPTA, DINESH;MUKHERJEE, DEV SHANKAR;MALIK, RAKESH, KUMAR
发明人
GUPTA, DINESH;MUKHERJEE, DEV SHANKAR;MALIK, RAKESH, KUMAR