发明名称 CLOCK PHASE ESTIMATION DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a clock phase estimation device which improves estimation precision of clock phases by considering variation of signal strength. <P>SOLUTION: A clock phase estimation part 20 sequentially inputs receiving signals having predetermined symbol periods and sampled in predetermined sampling timing. In a transformation part 48, square values of the receiving signals are subjected to transformation into the frequency regions on the basis of frequencies corresponding to the symbol periods, and the signals of frequency regions are generated. A calculation part 52 calculates magnitude of the signals of the frequency regions generated in the transformation part 48. A determination part 56 estimates the clock phases of the receiving signals in the sampling timing by deriving clock phase components of the signals of the frequency regions when magnitude of the signals of the frequency regions is larger than a threshold. <P>COPYRIGHT: (C)2007,JPO&INPIT
申请公布号 JP2007053700(A) 申请公布日期 2007.03.01
申请号 JP20050239119 申请日期 2005.08.19
申请人 JAPAN RADIO CO LTD 发明人 ONO YOSHITO
分类号 H04L7/00;H04L27/00 主分类号 H04L7/00
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