发明名称 Interface circuit and semiconductor device
摘要 A circuit that enables a loop-back test by adjusting phases of data and strobe signals at the input and output in an interface wherein the phase relationships between the data and the strobe signal for sampling the data are different between the input and output. In order to test a phase shift circuit 30 and a sampling circuit 40 on the input side, DQ and DQS are outputted with their phases aligned by a phase shift circuit 20 on the output side, DQ and DQS having the same phase are fed to input buffers 16 and 17 , respectively, from output buffers 14 and 15 , the phase of DQS is shifted by 90 degrees by phase shift circuit 30 , and DQ is sampled by sampling circuit 40 . In order to test the output function, the phase shift circuit 30 is controlled so that the phase of DQS is not shifted on the input side, the phase shift circuit 20 on the output side sets phase shift amount of the data sampling clock to 90 degrees, phase shift amount of DQS is fixed at 180 degrees, DQS whose phase has already been shifted by 90 degrees from that of DQ is fed to the input buffer 17 from output buffer 15 , phase is not shifted by the phase shift circuit 30 , and the sampling circuit 40 samples DQ looped back using DQS whose phase is shifted by 90 degrees.
申请公布号 US2007047337(A1) 申请公布日期 2007.03.01
申请号 US20060494698 申请日期 2006.07.28
申请人 NEC ELECTRONICS CORPORATION 发明人 IIZUKA YOICHI
分类号 G11C7/00 主分类号 G11C7/00
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