发明名称 Methods and apparatus for low power SRAM
摘要 Methods and apparatus provide for pre-charging a bit line and a complementary bit line of an SRAM memory cell of the SRAM memory to a voltage level below a power supply level, Vdd, of the SRAM memory prior to writing data to the memory cell.
申请公布号 US2007047349(A1) 申请公布日期 2007.03.01
申请号 US20050218009 申请日期 2005.09.01
申请人 TOKITO SHUNSAKU 发明人 TOKITO SHUNSAKU
分类号 G11C7/00 主分类号 G11C7/00
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