| 摘要 |
A method, algorithm, software, architecture, circuit, and/or system for assisting pull-in of a phase-locked loop (PLL) are disclosed. In one embodiment, a PLL can include: (i) a phase detector that may receive a serial data stream and output a pump control signal; (ii) a charge pump that can receive the pump control signal and substantially determine a frequency control when a precharge signal is de-asserted; (iii) a precharge/filter circuit that may connect to the charge pump and may substantially determine the frequency control when the precharge signal is asserted; and (iv) an oscillator that may connect to the precharge/filter circuit and may provide a recovered clock in response to the frequency control, where the recovered clock may be correlated to a frequency of the serial data stream. The frequency control may be current and/or voltage based, for example. Embodiments of the present invention can advantageously provide a reliable and simplified design approach for pulling-in a PLL lock.
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