发明名称 Memory device and manufacturing method thereof
摘要 A memory device comprising a substrate, a first insulation layer, a charge storage layer, a second insulation layer, a gate electrode layer and source/drain regions is provided. The forbidden gap of the substrate is larger than the forbidden gap of silicon. The first insulation layer is disposed over the substrate. The charge storage layer is disposed over the first insulation layer. The second insulation layer is disposed over the charge storage layer. The gate electrode layer is disposed over the second insulation layer. The gate electrode layer, the second insulation layer, the charge storage layer and the first insulation layer constitute a stacked structure. The source/drain regions are disposed in the substrate adjacent to two sides of the stacked structure.
申请公布号 US2007045707(A1) 申请公布日期 2007.03.01
申请号 US20050217206 申请日期 2005.08.31
申请人 WANG SZU-YU 发明人 WANG SZU-YU
分类号 H01L29/76 主分类号 H01L29/76
代理机构 代理人
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