发明名称 Cache memory systems and methods thereof
摘要 Cache memory systems and methods thereof are provided. A first example cache memory system may include a central processing unit (CPU) and a first memory, a second memory positioned between the CPU and the first memory and storing at least one block of the first memory and a block quantity determination unit which determines a block quantity indicating a number of blocks of the first memory to be stored in the second memory. A second example cache memory system, including a cache memory receiving a request to provide data associated with an input address, determining whether the input address is included in the cache memory, loading a plurality of adjacent data blocks, associated with the input address, from the main memory if the input address is not included within the cache memory.
申请公布号 US2007050552(A1) 申请公布日期 2007.03.01
申请号 US20060509753 申请日期 2006.08.25
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM DONG-KEUN
分类号 G06F12/00 主分类号 G06F12/00
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